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Results 1 to 25 of 1329

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Faster parallel multiplierDHURKADAS, A.Proceedings of the IEEE. 1984, Vol 72, Num 1, pp 134-136, issn 0018-9219Article

2.7-ns 8×8-bit parallel array multiplier using sidewall base contact structureWASHIO, K; NAKAZATO, K; NAKAMURA, T et al.IEEE journal of solid-state circuits. 1987, Vol 22, Num 4, pp 613-614, issn 0018-9200Article

Design considerations for paralleling bipolar transistorsJOVANOVIC, M. M; LEE, F. C. Y.IEEE transactions on power electronics. 1987, Vol 2, Num 4, pp 328-336, issn 0885-8993Article

Low cost package of 30Gbps pluggable parallel optical transmitter moduleCHEN, Yi-Ming; CHENG, Yao-Ling; CHEN, Ying-Chin et al.SPIE proceedings series. 2005, pp 672-677, isbn 0-8194-5578-4, 6 p.Conference Paper

Signal delay in general RC networksTZU-MU LIN; MEAD, C. A.IEEE transactions on computer-aided design of integrated circuits and systems. 1984, Vol 3, Num 4, pp 331-349, issn 0278-0070Article

Cause of instability of power amplifier with parallel-connected power transistorsKAZIMIERCZUK, M; SOKAL, N. O.IEEE journal of solid-state circuits. 1984, Vol 19, Num 4, pp 541-542, issn 0018-9200Article

Accessing sparse arrays in parallel memoriesBANERJEE, U; GAJSKI, D; KUCK, D et al.Journal of VLSI and computer systems. 1983, Vol 1, Num 1, pp 69-100, issn 0733-5644Article

Serial/parallel automultiplierSMITH, S. G.Electronics Letters. 1987, Vol 23, Num 8, pp 413-415, issn 0013-5194Article

Prinzipielle Eigenschaft eines parallel strukturierten Informationsverarbeitungssystems mit Mikroprozessoren = Propriété d'un système de traitement de l'information avec microprocesseur à structure parallèle = Property in principle of an information processing system with microprocessors structured in parallelSCHULZE, R.Nachrichtentechnik. Elektronik. 1985, Num 9, pp 351-353, issn 0323-4657Article

Design and application of a 2500-gate bipolar macrocell arraySUZUKI, M; KONAKA, S; ICHINO, H et al.IEEE journal of solid-state circuits. 1985, Vol 20, Num 5, pp 1025-1031, issn 0018-9200Article

An optoelectronic adderMACDONALD, R. I.Proceedings of the IEEE. 1986, Vol 74, Num 11, pp 1593-1595, issn 0018-9219Article

Parallel binary adders with a minimum number of connectionsSAKURAI, A; MUROGA, S.IEEE transactions on computers. 1983, Vol 32, Num 10, pp 969-976, issn 0018-9340Article

BREVET RAMPE THERMOCOUPLES POUR LA MESURE DE LA MOYENNE DE PLUSIEURS TEMPERATURES.1978; ; FRA; DA. 1978-10-27; FR/A1/2.382.000; DEP.7705557/1977-02-25Patent

CONVERTISSEUR ANALOGIQUE-DIGITAL PARALLELE-SERIEGOTLIB GI; ZAGURSKIJ V YA.1980; PRIB. TEH. EKSP.; ISSN 0032-8162; SUN; DA. 1980; NO 3; PP. 78-79; BIBL. 3 REF.Article

One-dimensional quantised ballistic resistors in parallel configurationSMITH, C. G; PEPPER, M; NEWBURY, R et al.Journal of physics. Condensed matter (Print). 1989, Vol 1, Num 37, pp 6763-6770, issn 0953-8984Article

FAST PARALLEL MULTIPLICATION.DAVIO M; BIOUL G.1977; PHILIPS RES. REP.; NETHERL.; DA. 1977; VOL. 32; NO 1; PP. 44-70; BIBL. 21 REF.Article

A high-speed high-density silicon 8×8-bit parallel multiplierLEE, J. Y; GARVIN, H. L; SLAYMAN, C. W et al.IEEE journal of solid-state circuits. 1987, Vol 22, Num 1, pp 35-40, issn 0018-9200Article

Direct two's-complement algorithm for XY±ZVASSILIADIS, S; PUTRINO, M; SWARTZ, E et al.Electronics Letters. 1987, Vol 23, Num 10, pp 538-540, issn 0013-5194Article

Research report. Formant synthesizers: cascade or parallel?HOLMES, J. N.Speech communication. 1983, Vol 2, Num 4, pp 251-273, issn 0167-6393Article

CELLULE ELEMENTAIRE D'UN MULTIPLICATEUR PARALLELE A GRAND NOMBRE DE CHIFFRES DU TYPE I2LVARICHENKO LV; LAPSHINOV ON.1980; MIKROELEKTRONIKA; ISSN 0544-1269; SUN; DA. 1980; VOL. 9; NO 5; PP. 423-432; BIBL. 6 REF.Article

MULTIPLYING WITH A MICROCOMPUTER CAN BE A DRAG. A SIMPLE MULTIPLIER/SHIFTER CAN SPEED UP SIGNED 12-BIT MULTIPLICATIONS BY A FACTOR OF 10 OR MORE.KOLODZINSKI A; WAINLAND D.1978; ELECTRON. DESIGN; U.S.A.; DA. 1978; VOL. 26; NO 2; PP. 78-83Article

BREVET 2.324.896 (A1) (75 28441). - 17 SEPTEMBRE 1975. FRONT DE CAPTAGE CELLULAIRE DE L'ENERGIE EOLIENNE.sdPatent

Iterative parallel multipliers based on multiplexersDE MORI, R; CARDIN, R.Signal processing. 1984, Vol 6, Num 3, pp 213-223, issn 0165-1684Article

A characterization of a class of non-binary matroidsOXLEY, J. G.Journal of combinatorial theory. Series B. 1990, Vol 49, Num 2, pp 181-189, issn 0095-8956Article

A 280-ps Josephson 4-bit×4-bit parallel multiplierSONE, J; TSAI, J.-S; ABE, H et al.IEEE journal of solid-state circuits. 1985, Vol 20, Num 5, pp 1056-1060, issn 0018-9200Article

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